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The Ethernet MAC core connects to the PHY chip through the external FPGA pins. Our module takes the Ethernet "frames" captured by the EthMAC, processes them, and determines what kind of response the device should send.Ībove shows the connections between the different cores and the on-board PHY chip Interface The interface we created does much of the work typically reserved for the next two layers, Network and Transport. It will buffer recieved frames and transmit them, do CRC error checking, ignore packets designated for other devices (by MAC address), and if the buffer is full, it can transmit pause frames to tell other devies to slow down transmission. This is the first layer that actually looks at the raw data stream to see what it contains. The Ethernet MAC core, a Media Access Controller, takes care of much of this. This is where all the flow control, most of the error correction and much of the buffering happens. It simply decodes the bytes that stream from the lines, and gives signals when data collisions occur and when the line is busy. The Marvell PHY chip resides on this level. This is the actual Ethernet jack and Cat 5e/6 cable that physically connects devices. The most basic layer is the Physical Layer.
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The Internet Protocol can be described as being composed of many abstraction "layers" that allows software to communicate over a hardware I/O protocol. The networking protocols that our interface was able to successfully implement are the ARP, PING (ICMP), and UDP protocols. Additionally, the board was able to transmit data packets of its own. Through this interface, the board could receive data packets sent over an Ethernet network from an external source. Additionally, the Altera Monitor provides an easy interface for compiling and communicating with the NIOS.įor our project, we designed a software interface that communicated with the board via the Altera Monitor. The NIOS processor uses C to program, making math and string operations relatively easy. Ideally, we would have liked to connect this Ethernet core to a small, stack-based cpu, but found that for debugging, it was much easier to use an Altera NIOS II processor to manipulate bytes of data.

We managed to find an open-source (see Licensing) Ethernet Controller, "EthMac", on that interfaced with the PHY chip and could capture entire Ethernet frames of data easily. They perform virtually no flow or error control, and only stream the data as it comes through. The Marvell Chips only provide a basic low-level interface to the Ethernet. These Ethernet cores would be ideally open-source, very small, and easily configurable. There are many applications and potential projects that can be implemented only with board that has the ability to connect to the Internet-a web server, a sensor that streams data to a server, or a network of several boards for a parallel processing scheme, to name a few. Unfortunately, the only IP cores that could be found to make use of the Ethernet were closed-source and required the use of Altera’s proprietary NIOS II processor, which is also closed-source. Also on board are two Marvell 88ee1111 (Ethernet PHY) chips that allow two gigabit Ethernet connections. This year's ECE 5760 class used a Terasic DE2-115 board, containing an Altera Cyclone IV FPGA. Our project was to design an interface that enabled the FPGA board to communicate with other devices via the on-board Ethernet connection following several established networking protocols. It clearly explains what is useful for circuit design and what parts of.
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Throughout the book, many small examples are used to validate concepts and demonstrate how to apply design skills.This book takes readers who have already learned the fundamentals of digital design to the point where they can produce working circuits using modern design methodologies. The book covers not only the syntax and limitations of HDL coding, but deals extensively with design problems such as partitioning and synchronization, helping you to produce designs that are not only logically correct, but will actually work when turned into physical circuits. In addition to covering the syntax of Verilog and SystemVerilog, the author provides an appreciation of design challenges and solutions for producing working circuits. For those with a basic understanding of digital design, this book teaches the essential skills to design digital integrated circuits using Verilog and the relevant extensions of SystemVerilog.
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Read Online and Download Digital Integrated Circuit Design Using Verilog and Systemverilog. Digital Integrated Circuit Design Using Verilog and Systemverilog BY Ronald W Mehler
